Fig. 1
Simplified hybrid SFCL circuit in (a) the normal operation and (b) during fault conditions.
Fig. 2
Cross-section of the tape 2G YBCO and its electrical representation [ 19[19] G. R. F. Q. Mafra, G. G. Sotelo, M. Z. Fortes, and W. T. B. de Sousa, “Application of resistive superconducting fault current limiters in offshore oil production platforms,” Electr. Power Syst. Res. , vol. 144, pp. 107–114, Mar. 2017. ], [ 30[30] A. T. Queiroz et al., “Simulation of resistive superconducting fault current limiter in ATPDraw,” in 2018 Simpósio Brasileiro de Sistemas Eletricos (SBSE) , Niterói, 2018, pp. 1–5. ], [ 32[32] W. T. B. de Sousa, A. Polasek, R. Dias, C. F. T. Matt, and R. de Andrade, “Thermal–electrical analogy for simulations of superconducting fault current limiters,” Cryogenics , vol. 62, pp. 97–109, Jul. 2014. ].
Fig. 3
Flowchart of the iterative process of resistivity and electric current in the superconductor. Adapted from [ 30[30] A. T. Queiroz et al., “Simulation of resistive superconducting fault current limiter in ATPDraw,” in 2018 Simpósio Brasileiro de Sistemas Eletricos (SBSE) , Niterói, 2018, pp. 1–5. ], [ 32[32] W. T. B. de Sousa, A. Polasek, R. Dias, C. F. T. Matt, and R. de Andrade, “Thermal–electrical analogy for simulations of superconducting fault current limiters,” Cryogenics , vol. 62, pp. 97–109, Jul. 2014. ].
Fig. 4
Temperature variation within a cross-section of the superconducting tape layers. Adapted from [ 19[19] G. R. F. Q. Mafra, G. G. Sotelo, M. Z. Fortes, and W. T. B. de Sousa, “Application of resistive superconducting fault current limiters in offshore oil production platforms,” Electr. Power Syst. Res. , vol. 144, pp. 107–114, Mar. 2017. ], [ 30[30] A. T. Queiroz et al., “Simulation of resistive superconducting fault current limiter in ATPDraw,” in 2018 Simpósio Brasileiro de Sistemas Eletricos (SBSE) , Niterói, 2018, pp. 1–5. ], [ 32[32] W. T. B. de Sousa, A. Polasek, R. Dias, C. F. T. Matt, and R. de Andrade, “Thermal–electrical analogy for simulations of superconducting fault current limiters,” Cryogenics , vol. 62, pp. 97–109, Jul. 2014. ].
Fig. 5
Thermal-electrical equivalent for the 2G tape. Adapted from [ 19[19] G. R. F. Q. Mafra, G. G. Sotelo, M. Z. Fortes, and W. T. B. de Sousa, “Application of resistive superconducting fault current limiters in offshore oil production platforms,” Electr. Power Syst. Res. , vol. 144, pp. 107–114, Mar. 2017. ], [ 30[30] A. T. Queiroz et al., “Simulation of resistive superconducting fault current limiter in ATPDraw,” in 2018 Simpósio Brasileiro de Sistemas Eletricos (SBSE) , Niterói, 2018, pp. 1–5. ], [ 32[32] W. T. B. de Sousa, A. Polasek, R. Dias, C. F. T. Matt, and R. de Andrade, “Thermal–electrical analogy for simulations of superconducting fault current limiters,” Cryogenics , vol. 62, pp. 97–109, Jul. 2014. ].
Fig. 2
Cross-section of the tape 2G YBCO and its electrical representation [ 19[19] G. R. F. Q. Mafra, G. G. Sotelo, M. Z. Fortes, and W. T. B. de Sousa, “Application of resistive superconducting fault current limiters in offshore oil production platforms,” Electr. Power Syst. Res. , vol. 144, pp. 107–114, Mar. 2017. ], [ 30[30] A. T. Queiroz et al., “Simulation of resistive superconducting fault current limiter in ATPDraw,” in 2018 Simpósio Brasileiro de Sistemas Eletricos (SBSE) , Niterói, 2018, pp. 1–5. ], [ 32[32] W. T. B. de Sousa, A. Polasek, R. Dias, C. F. T. Matt, and R. de Andrade, “Thermal–electrical analogy for simulations of superconducting fault current limiters,” Cryogenics , vol. 62, pp. 97–109, Jul. 2014. ].
Fig. 3
Flowchart of the iterative process of resistivity and electric current in the superconductor. Adapted from [ 30[30] A. T. Queiroz et al., “Simulation of resistive superconducting fault current limiter in ATPDraw,” in 2018 Simpósio Brasileiro de Sistemas Eletricos (SBSE) , Niterói, 2018, pp. 1–5. ], [ 32[32] W. T. B. de Sousa, A. Polasek, R. Dias, C. F. T. Matt, and R. de Andrade, “Thermal–electrical analogy for simulations of superconducting fault current limiters,” Cryogenics , vol. 62, pp. 97–109, Jul. 2014. ].
Fig. 4
Temperature variation within a cross-section of the superconducting tape layers. Adapted from [ 19[19] G. R. F. Q. Mafra, G. G. Sotelo, M. Z. Fortes, and W. T. B. de Sousa, “Application of resistive superconducting fault current limiters in offshore oil production platforms,” Electr. Power Syst. Res. , vol. 144, pp. 107–114, Mar. 2017. ], [ 30[30] A. T. Queiroz et al., “Simulation of resistive superconducting fault current limiter in ATPDraw,” in 2018 Simpósio Brasileiro de Sistemas Eletricos (SBSE) , Niterói, 2018, pp. 1–5. ], [ 32[32] W. T. B. de Sousa, A. Polasek, R. Dias, C. F. T. Matt, and R. de Andrade, “Thermal–electrical analogy for simulations of superconducting fault current limiters,” Cryogenics , vol. 62, pp. 97–109, Jul. 2014. ].
Fig. 5
Thermal-electrical equivalent for the 2G tape. Adapted from [ 19[19] G. R. F. Q. Mafra, G. G. Sotelo, M. Z. Fortes, and W. T. B. de Sousa, “Application of resistive superconducting fault current limiters in offshore oil production platforms,” Electr. Power Syst. Res. , vol. 144, pp. 107–114, Mar. 2017. ], [ 30[30] A. T. Queiroz et al., “Simulation of resistive superconducting fault current limiter in ATPDraw,” in 2018 Simpósio Brasileiro de Sistemas Eletricos (SBSE) , Niterói, 2018, pp. 1–5. ], [ 32[32] W. T. B. de Sousa, A. Polasek, R. Dias, C. F. T. Matt, and R. de Andrade, “Thermal–electrical analogy for simulations of superconducting fault current limiters,” Cryogenics , vol. 62, pp. 97–109, Jul. 2014. ].
Fig. 6
Proposed Hybrid SFCL simulation in PSCAD/EMTDC software.
Fig. 7
(a) Component created in PSCAD/EMPTDC to calculate the resistance of the superconducting tape and (b) variable resistance.
Fig. 8
Switching control.
Fig. 7
(a) Component created in PSCAD/EMPTDC to calculate the resistance of the superconducting tape and (b) variable resistance.
Fig. 8
Switching control.
Fig. 9
Currents in hybrid SFCL.
Fig. 10
The controlling relationship between current and voltage.
Fig. 11
Temperature rise of each of the superconducting layer - using thyristors.
Fig. 12
Temperatures of the superconducting layers - Limiter with emulated mechanical switch.
Fig. 13
Limited current using thyristors and emulated mechanic switch.