An Amorphous Silicon Photo TFT with Si₃N₄/Al₂O₃ or HfO₂ Double Layered Insulator for Digital Imaging Applications

Abstract

This paper focuses on amorphous silicon photo thin-film transistors with double layered insulator using Si₃N₄/Al₂O₃ or HfO₂ as candidates for the succession of Si₃N₄ as a traditional insulator in the fabrication of hydrogenated amorphous silicon thin-film transistors. Whether for industry or for research, there is a need to investigate the use of thin gate insulators for these devices to overcome leakage current. Our investigations included direct and transfer characteristics in dark and under illumination, generated photocurrents, external quantum efficiency and responsivity. Performance is evaluated in terms of the dielectric thickness and nature. Improvements in the proposed structures regarding off-current, responsivity and quantum efficiency are achieved via these materials. Comparing with Si₃N₄/HfO₂ transistor, the Si₃N₄/Al₂O₃ device shows the lowest off-current. The HfO₂ device presents the highest on-current when illuminated. The generated photocurrent is higher for Si₃N₄/HfO₂ transistor revealing a lower amount of trapped charge. Under illumination and for very thin thicknesses, both devices enhance the Si₃N₄ device off-current and reach Si₃N₄ single layer dielectric based phototransistor performance. external quantum efficiency and responsivity are higher in HfO₂ devices comparing with Al₂O₃ devices. The results are promising and may support further investigations in order to develop high k gate insulators for MIS photo thin-film transistors.

Index Terms
a-Si:H TFT; Al₂O₃; External Quantum Efficiency; HfO₂; Photocurrent; Responsivity; Si₃N₄

I. INTRODUCTION

Amorphous silicon thin film transistor (a-Si:H TFT) technology is receiving more consideration due its wider applications. The utilization of amorphous silicon TFT is dictated by some advantages like simple fabrication process, high charge transfer rate, low capacitance, high photo-sensitivity and low noise [¹]-[³]. In digital radiography, this technology allowed the at panel detectors (FPDs) to be commercially available for many kinds of medical imaging detectors. One way that digital X-ray imaging detectors exploit in detection operation is indirect method. This method consists of the use of a scintillation film that first converts X-rays to visible light, before the electronic signal is obtained by an array of photo-detectors. The elementary building block of FPDs is the pixel which is composed of three components: a sensor for signal acquisition, a storage capacitor for data storage, and a switch for signal readout [⁴], [⁵]. As light sensing element, either phototransistors or photodiodes are used. Comparing with the photodiodes, and despite their slow response time, photo-transistors are preferable because they offer a high optical gain and are compatible with the standard a-Si:H TFTs technology [⁶], [⁷]. Since several years and for many applications, many structures for transistors and phototransistors were investigated in order to improve device performance [⁷]-[¹⁴]. Among these structures, were reported transistors with dual layer gate dielectric [¹⁵], [¹⁶], and/or high k materials as gate dielectrics [¹⁷]-[¹⁹]. It has been demonstrated that dual-layer dielectric structures are used because of two major advantages: high yield and improved transistors characteristics [²⁰].

In this paper, an amorphous silicon photo TFT (APT) with Si₃N₄/Al₂O₃ or HfO₂ double layered insulator for digital imaging applications is investigated in order to optimize detectors characteristics. The addition of the second dielectric layer is considered while keeping Si₃N₄ for its good interface with amorphous silicon. In an attempt to replace the traditional use of Si₃N₄ (dielectric constant of 6-8), higher k Al₂O₃ (dielectric constant of 8-9) and HfO₂ (dielectric constant of 25) dielectrics are used with this insulator to study APT performance for process integration and size scaling. In fact, Si₃N₄ insulator suffers from its limited capacitance density because of low dielectric constant [¹⁶]. As a consequence, there is a limit in the use of thin dielectric layers. A comparative study for three APTs; with Si₃N₄ single dielectric layer (APT1), Si₃N₄/Al₂O₃ double dielectric layer (APT2), then Si₃N₄/HfO₂ double dielectric layer (APT3) structures is done regarding to detectors performance. It is worth noting that our APTs have an aluminum metal gate material. This will contribute in eliminating the depletion capacitance of the gate electrode [¹⁸]. Investigations include APTs direct and transfer current characteristics, photocurrent, external quantum efficiency EQE and responsivity R. A comparison between the APTs performance in terms of dielectric nature and thickness is established. The paper is organized as follows: Section II describes the adopted APTs structures, Section III illustrates the obtained results, while Section IV concludes the paper.

II. Device Structure

The simulations performed in this work were carried out by Silvaco software, it has two modules, Atlas for device simulations and Athena for process simulations. The device structure adopted in this paper is an amorphous silicon based inverted-staggered bottom gate phototransistor. The inverted-staggered bottom gate structure has better characteristics than the top gate (normal or staggered) one [²⁰], [²¹]. Compared with the normal, staggered transistor, the inverted, staggered TFT has higher field effect mobility μ_eff, lower threshold voltage V_th, higher on-current I_on and lower threshold shift ΔV_th under stress [²⁰], [²¹]. The total structure length and width are 14 μm and 100 μm, respectively. The drain and source contacts lengths are 2μm each and the channel length is 10 μm. The thicknesses of the undoped and the n+ doped contact a-Si: H layers are 300 nm and 100 nm, respectively. An adequate choice of the a-Si layer thickness was necessary in order to guarantee a layer channel thick enough to maximize the number of absorbed photons on one hand [²²], and reduce the contact resistance on the other hand [⁶]. In Atlas, the material parameter which defines properties of amorphous silicon is the density of defect states (DOS) [²³]. In this tool, the latter is composed of four bands: two tail bands and two deep level ones. The tail bands are composed of a donor-like valence band and an acceptor-like conduction band. The deep bands are composed of one acceptor-like band and one donor-like band. These are modeled using a Gaussian distribution as follows [²³]:

(1) $$\mathrm{g}(\mathrm{E})={\mathrm{g}}_{\text{TA}}(\mathrm{E})+{\mathrm{g}}_{\text{TD}}(\mathrm{E})+{\mathrm{g}}_{\text{GA}}(\mathrm{E})+{\mathrm{g}}_{\text{GD}}(\mathrm{E})$$

Where E is the trap energy and the subscripts T, G, A and D denote respectively tail, Gaussian, acceptor and donor states. g_TA, g_TD, g_GA and g_GD are expressed by [²³]:

(2) $${\mathrm{g}}_{\text{TA}}(\mathrm{E})=\text{NTA exp}\left(\frac{\mathrm{E}-{\mathrm{E}}_{\mathrm{C}}}{\text{WTA}}\right)$$

(3) $${\mathrm{g}}_{\text{TD}}(\mathrm{E})=\text{NTD exp}\left(\frac{{\mathrm{E}}_{\mathrm{v}}-\mathrm{E}}{\text{WTD}}\right)$$

(4) $${\mathrm{g}}_{\text{GA}}(\mathrm{E})=\text{NGA exp}\left[-{\left(\frac{{\mathrm{E}}_{\text{GA}}-\mathrm{E}}{\text{WGA}}\right)}^2\right]$$

(5) $${\mathrm{g}}_{\text{GD}}(\mathrm{E})=\text{NGD exp}\left[-{\left(\frac{\mathrm{E}-{\mathrm{E}}_{\text{GD}}}{\text{WGD}}\right)}^2\right]$$

E_C is the conduction band edge energy and E_V is the valence band edge energy. The DOS parameters can be specified by the user. Table I shows the user-specifiable parameters for the density of defect states [²⁴]. In this table, for the exponential tail distribution NTA and NTD are the conduction and valence band edge intercept densities, WTA and WTD are the DOS characteristic decay energies. For the Gaussian distribution, NGA and NGD are densities for acceptor-like donorlike bands, respectively, and EGA and EGD are peaks for energy distribution [²³].

Table I
User-specifiable parameters for the density of defect states [²³], [²⁴]

Parameter	Value	Units
NTA	1 × 1021	cm-3/eV
NTD	1×1021	cm-3/eV
NGA	1×1016	cm-3/eV
NGD	1×1016	cm-3/eV
EGA	0.6	eV
EGD	0.6	eV
WTA	0.05	eV
WTD	0.05	eV
WGA	0.3	eV
WGD	0.3	eV
EG	1.8	eV

Various physical and mathematical models have been used to perform analysis in Atlas: Shockley-Read Hall (sRH) model and physical models for recombination mechanisms and carrier mobility, and Newton and Gummel method for numerical simulations. Cross sections of the adopted transistor structures for our simulations are illustrated on. Fig. 1a shows a phototransistor with a single layer of a Si₃N₄ dielectric, Fig. 1b shows the photo-transistor which uses a dual layer dielectric of Si₃N₄/Al₂O₃, and Fig. 1c shows a phototransistor which uses a dual layer dielectric of Si₃N₄/HfO₂.

Fig. 1
The APTs under study: (a) APT1, (b) APT2 and (c) APT3.

III. Results and Discussion

A. Wavelength Selectivity

In indirect pixels, phototransistors, as sensing devices, are designed to detect visible light. The fact that absorption of visible light is more important in amorphous silicon than in crystalline silicon [²⁵] will help to reduce optical loss and improve photoelectric conversion efficiency [²⁵]. To probe the wavelength selectivity of our APTs, the drain current was simulated under visible light with a gate-to- source voltage VGS and a drain-to-source voltage VDS equal to 10 V and 0.1 V respectively. The results are shown on Fig. 2. This figure shows clearly a higher sensitivity in the blue region.

Fig. 2
Wavelength selectivity of the APTs under study.

The drain current peaks at a wavelength of 420 nm for the three APTs where most of the light intensity was absorbed by the 300 nm a-Si layer. The peak is situated around 0.14 A for the single layer dielectric APT, 0.17 A for the Si₃N₄/Al₂O₃ dual layer dielectric APT, and 0.26 A for the si₃N₄/HfO₂ dual layer dielectric APT. Below this wavelength, absorption in the amorphous silicon layer increases, while beyond, recombination at the a-si/insulator interface dominates. This response matches well with that found in [⁷], [²⁶]. This result suggests the use of a Lutetium Oxyorthosilicate (Ce) scintillator or a Sodium doped Cesium Iodide (CsI:Na) scintillator who's emission spectra peak matches well with absorption peak spectral of our APTs for an optimum of performance [²²], [²⁷]. On the other hand, to reinforce the above mentioned result, the photogeneration rate of our phototransistors was simulated by illumination of the devices from the top side with 0.16 mW/cm² light intensity, and 365 nm, 420 nm and 550 nm wavelengths. The results are shown on Fig. 3. The latter reveals again that the photogeneration rate is the highest for the wavelength of 420 nm.

Fig. 3
Photogeneration rate in the phototransistor with (Si₃N₄) gate dielectric for (a) 365 nm, (b) 420 nm and (c) 550 nm wavelengths under 0.16 mW/cm².

Fig. 4
Photogeneration rate in the phototransistor with (Si₃N₄/Al₂O₃) gate dielectric for (a) 365 nm, (b) 420 nm and (c) 550 nm wavelengths under 0.16 mW/cm².

Fig. 5
Photogeneration rate in the phototransistor with (Si₃N₄/HfO₂) for (a) 365 nm, (b) 420 nm and (c) 550 nm wavelengths under 0.16 mW/cm².

B. Current-Voltage Characteristics in Dark and Under Illumination

Taken as a reference, the amorphous phototransistor APT1 with Si₃N₄ single dielectric layer was first investigated. Under light intensity of 0.16 mW/cm² and using a wavelength of 420 nm, dark and illumination characteristics of the device were simulated. Transfer and direct characteristics are illustrated on Fig. 6. This figure illustrates the obtained results for Si₃N₄ thicknesses of 1 nm, 30 nm, and 150 nm. Threshold voltage, on- and off- currents for these figures are given on Table II.

Fig. 6
Transfer characteristics of APT1. (a) in dark, (b) under illumination with 420 nm.

Table II
Threshold voltage, on- and off-currents for Fig. 6.

	Vt		Ion		Ioff
	Dark	Light	Dark	Light	Dark	Light
Si3N4= 1 nm	0.6	0.61	1.43×10-6	4.93×10-6	5.23×10-7	1.78×10-6
Si3N4= 30 nm	0.9	0.89	1.00×10-6	3.41×10-6	3.66×10-9	1.39×10-8
Si3N4=150 nm	4.6	4.56	2.80×10-7	9.54×10-7	1.79×10-10	1.30×10-9

In dark condition, the drain current is significant when Si₃N₄ layer is very thin. When the latter becomes thicker, it decreases and the leakage becomes weaker. Under illumination (Fig. 6b), the current rises significantly revealing a high generation of electron-hole paires. The off-current is the lowest and the threshold voltage is higher for 150 nm insulator thickness. However, the on-current is higher for 1nm not with a big difference with 30 nm insulator thickness. Thus, regarding off-current, illumination on-current, and threshold voltage findings, a trade-off was made to take an Si₃N₄ thickness of 30 nm.

Under the same conditions as for APT1, a comparative study for the three APTs with Si₃N₄ single dielectric layer (APT1), as a reference, Si₃N₄/Al₂O₃ double dielectric layer (APT2), and Si₃N₄/HfO₂ double dielectric layer (APT3) structures is done regarding to the nature of the used dielectric and its thickness. Fig. 7 - Fig. 9 show in dark transistors direct and transfer characteristics for Al₂O₃ and HfO₂ thicknesses of 1 nm, 30 nm and 150 nm, while maintaining Si₃N₄ thickness equal to 30 nm. For 1 nm thickness (Fig. 7), even dark currents are comparable for the three structures, the one with Si₃N₄/Al₂O₃ has the lowest dark current. Al₂O₃ and HfO₂ are very thin enabling leaks to happen. The threshold voltages are also comparable. They are of 0.93 V for Si₃N₄/Al₂O₃ combination and of 0.91 V for Si₃N₄/HfO₂ combination. The dark off-currents are in the order of 3 nA. Fig. 8 shows that for 30 nm /30 nm, the amount of dark current is lower when Al₂O₃ is used with Si₃N₄.

Fig. 7
(a) Direct and (b) transfer characteristics of the APTs under study for 1nm second dielectric layer thickness in dark.

Fig.8
(a) Direct and (b) transfer characteristics of the APTs under study for 30 nm second dielectric layer thickness in dark.

Fig.9
(a) Direct and (b) transfer characteristics of the APTs under study for 150 nm second dielectric layer thickness in dark.

The off-current is approximately equal to 1.07 nA for Al₂O₃ while it reaches 1.91 nA approximately for HfO₂ as a second dielectric. The threshold voltage varies from 1.9 V with Al₂O₃ to 1.3 V with HfO₂ When the insulator second layer is thicker (150 nm), regarding Fig. 9, Si₃N₄/Al₂O₃ presents the lowest dark current. The off-current varies from 0.177 nA for Si₃N₄/Al₂O₃ to 0.526 nA for Si₃N₄/HfO₂. The threshold voltage varies from 4.6 V for the former to 3 V for the latter. Thus as a preliminary conclusion, one can conclude that use of Al₂O₃ and HfO₂ combined with Si₃N₄ as gate insulators for APTs reduces the dark current which may enhance the dynamic range of photodetectors [¹¹]. As for under dark conditions, our transistors responses were analyzed under illumination for the same conditions.

Fig. 10 - Fig. 12 show the obtained results for both direct and transfer characteristics. In accordance with Fig. 10, for 1 nm thickness of Al₂O₃ combined with Si₃N₄, the results show once again expected comparables results for the three APTs in terms of current and threshold voltage. From 30 nm to 31 nm the difference is not noticeable although the photogeneration effect.

Fig. 10
(a) Direct and (b) transfer characteristics of the APTs under study for 1nm second dielectric layer thickness and under illumination with 420 nm.

Fig. 11
(a) Direct and (b) transfer characteristics of the APTs under study for 30nm second dielectric layer thickness under illumination with 420 nm.

Fig. 12
(a) Direct and (b) transfer characteristics of the APTs under study for 150nm second dielectric layer thickness under illumination with 420 nm.

Table III gives the obtained values for on- and off-currents, and threshold voltages. The on-to-off current ratio is 2.52 × 10² for APT3 and is 2.6 × 10² for APT2 when Al₂O₃ is used. For 30 nm thickness of Al₂O₃ and HfO₂, the results show that under illumination by 420 nm wavelength, even the off-current is minimum for APT2 (use of Al₂O₃), the use of HfO₂ as a second insulating layer gives higher on-current. The values are 3.15 μΑ for Si₃N₄/HfO₂ combination while they are of 2.79 μΑ for Si₃N₄/Al₂O₃ combination. The respective threshold voltages are 1.3 V and 1.9 V approximately. The on-to-off current ratio is 4×10² for APT3 and is 6×10² for APT2. It is thus higher for APT2 when Al₂O₃ is used with Si₃N₄. For 150 nm thickness of Al₂O₃ and HfO₂, Fig. 12 shows that when enough thick, the use of HfO₂ as a second insulating layer presents the highest on-current under illumination. The values are 2.05 μΑ for Si₃N₄/HfO₂ combination and 0.946 μΑ for Si₃N₄/Al₂O₃ combination (Table. III), respectively. The respective threshold voltages are 3 V and 4.57 V. Respective On-to-off currents are 7.8×10² and 7.28×10². It is worth noting that, if Al₂O₃ in APT2 improves the off-current, the on-current under illumination is higher for HfO₂ in APT3 than for APT2. The same findings were reported in [¹⁷] and in [¹⁹] where it was shown that the Al₂O₃ transistors show the best subthreshold slope and the interface trap density and that the HfO₂ transistors reach a higher transconductance.

Table III
Threshold voltages, on- and off- currents for Fig.7- Fig. 12.

	Vt		Ion		Ioff
	Dark	Light	Dark	Light	Dark	Light
t(Si3N4) = 30 nm	0.89	0.88	1.00×10-6	3.41×10-6	3.66×10-9	1.39×10-8
t (Si3N4/Al2O3)= 30 nm/1 nm	0.93	0.93	9.94×10-7	3.39×10-6	3.44×10-9	1.31×10-8
t (Si3N4/HfO2) = 30 nm/1 nm	0.9	0.9	9.98×10-7	3.40×10-6	3.57×10-9	1.35×10-8
t (Si3N4) = 30 nm	0.89	0.88	1.00×10-6	3.41×10-6	3.66×10-9	1.39×10-8
t(Si3N4 /Al2O3) = 30 nm/30 nm	1.9	1.89	8.18×10-7	2.79×10-6	1.07×10-9	4.61×10-9
t (Si3N4 /HfO2) = 30 nm/30 nm	1.3	1.3	9.25×10-7	3.15×10-6	1.91×10-9	7.67×10-9
t(Si3N4) = 30 nm	0.89	0.88	1.00×10-6	3.41×10-6	3.66×10-9	1.39×10-8
t (Si3N4 /AI2O3) = 30 nm/150 nm	4.57	4.55	2.70×10-7	9.46×10-7	1.77×10-10	1.30×10-9
t (Si3N4 /HfO2) = 30 nm/150 nm	3.02	3.01	6.01×10-7	2.05×10-6	5.26×10-10	2.62×10-9

On the other hand, the resulting photocurrent generated in our three APTs in terms of high k dielectric nature is shown on Fig. 13, and in terms of dielectric thickness on Fig. 14. As mentioned earlier, Fig. 13 reveals that the HfO₂ device has higher photocurrent versus Al₂O₃ device. As a function of the dielectrics thicknesses, Fig. 14 shows that, as expected, thinner insulator thickness generates higher photocurrent and higher leakage current as well. From dark and illumination results all together, one can conclude that comparing with Si₃N₄ device, the leakage property is improved with Al₂O₃ and HfO₂ insulators as was reported in [²⁰] due the high k effect, and further in the Al₂O₃ device for its better off-current characteristics comparing with HfO₂ device. This can be attributed to the very low defect density in Si₃N₄/Al₂O₃ system [¹⁵], [²⁸]. Under illumination, the on-current for HfO₂ device is higher for all the APTs revealing the drift as the dominant component of photocurrent and /or lower trapping mechanisms [¹¹].

Fig. 13
Generated photocurrent vs gate voltage for the APTs under study illuminated by 420 nm for different second layer dielectric thickness.

Fig. 14
Generated photocurrent vs gate voltage of APT2 and APT3 illuminated by 420 nm for (a) Si₃N₄/Al₂O₃ combination thickness an (b) Si3N₄/HfO₂ combination thickness.

C. External Quantum Efficiency and Responsivity

Our detectors were also investigated in terms of external quantum efficiency EQE, and responsivity R which are effective performance metrics for imaging applications. A detectors EQE indicates if the detector is capable to convert optical signal to electrical signal, while responsivity defines transfer gain. The latter is the ratio of the photocurrent flowing through the detector to the incident optical power. It is given by the expression [²⁹]:

(6) $$\mathrm{R}=\frac{({\mathrm{I}}_{\text{illumination}}-{\mathrm{I}}_{\text{dark}})}{\mathrm{P}}=\frac{{\mathrm{I}}_{\text{ph}}}{\mathrm{P}}$$

where I_illummation is the total current under illumination, I_ph is the photocurrent, I_dark is the dark current and P is the power of the incident light per unit area. The EQE is given by the expression [²⁹]:

(7) $$\text{EQE=}\frac{{\mathrm{I}}_{\text{ph}}\text{/q}}{\text{P/hv}}$$

Fig. 15 and Fig. 16 show EQE and responsivity of our phototransistors as a function of the drain voltage for different insulators thicknesses when illuminated with visible blue light at power density of 0.16 mW/cm² and biased at V_GS =10 V. In Fig. 15, EQEs higher than unity are obtained. As expected, thicker insulators degrade the devices efficiently. APTs with HfO₂ as a second dielectric layer exhibit higher efficiency because of the higher photogenerated current. At 150 nm, gain lower than unity is obtained revealing a decreased number of photogenerated carriers. As illustrated by Fig. 16, the same trends are obtained for responsivity. As expected, in terms of thickness, thinner insulators give higher transfer gains due to higher photocurrents. HfO₂ APT gives better responsivity than Al₂O₃. Responsivity saturates for high drain voltages following the saturation of the photogenerated current.

Fig. 15
EQE vs drain voltage for the APTs under study illuminated by 420 nm for second dielectric layer thickness of (a) 1 nm, (b) 30 nm and (c) 150 nm.

Fig. 16
Responsivity vs drain voltage for the APTs under study illuminated by 420 nm for second dielectric layer thickness of (a) 1nm; (b) 30 nm and (c) 150 nm.

Several facts contributed to the obtained higher than unity EQEs. In addition to the choice of a-Si thickness, many parameters involved in the photogeneration process were investigated. Fig. 17. illustrates the wavelength dependency of EQE (Fig. 17a) and responsivity (Fig. 17b) for different a-Si thicknesses for white light illumination. It clearly appears that the phototransistors selectivity is mainly determined by the material thickness, and that, at 420 nm wavelength, our APTs are very sensitive. They present a maximum response for 300 nm a-Si thickness. In other words, they absorb efficiently the emitted photons so that the dose to which the patient is exposed becomes low.

Fig. 17
Wavelength dependency of (a) EQE, and (b) Responsivity for different a-Si thicknesses.

According to equation (7), the EQE is proportional to the photocurrent so that $\text{EQE}=\text{k}.{\text{I}}_{\text{ph}}({\text{V}}_{\text{d}})$, where $\text{k}=(\text{h}.\text{c})/(\text{λ}.\text{q}{.\text{P}}_{\text{inc}})$ is a constant and I_ph(V_d) is the drain-to-source photocurrent. So, the EQE follows the same trends of the photocurrent. As it is higher than unity, a multiplication process may have occurred in our phototransistors. Even carriers with energies lower than the amorphous silicon bandgap may have contributed to the generation of electron-hole pairs. This phenomenon was experimentally observed and described in [³⁰] and [³¹], and was attributed to impact ionization by charge carriers. In fact, an extra optical gain may have happened through the flight of the charge carriers to the drain where they are collected. In amorphous silicon transistors, it was found that for higher gate voltages, surface states have negligible effect on I-V characteristics and on the field effect- to-band mobility ratio which gets maximum values [³²]. So, during their flight from the source to the drain, the carriers are not subject to trapping effect. Their mean free path becomes longer which results in higher mobility-lifetime product, especially for the chosen a-Si thickness which guarantees a maximum of the number of absorbed photons, as mentioned above and shown in Fig. 17. Thus, carriers acquire enough energies because of collisions in the presence of a high electric field, which leads to an increasing in the number of carriers with high energies capable of causing impact ionization [³⁰] [³¹]. Effectively Fig. 18, shows the variation of the electric field along the source-to- drain path. It presents a maximum of a 2.41×10⁵ V/cm at the drain side region. Very similar values were obtained in [³³] and have been demonstrated to be source of impact ionization.

Fig. 18
Electric field variation along the source/drain.

The variation of the recombination rate between source and drain regions is illustrated in Fig. 19. A recombination rate peak of 2.21×10²⁰ /cm3s is noticed under the source at the contact n+ doped a- Si/intrinsic a-Si. This recombination with the electrons is due to the holes blocked by the built-in potential barrier at this contact. The latter is then reduced by these accumulated holes under the source to lead to a large secondary electron photocurrent by electron injection so that this recombination becomes weaker in the drain region to reduce to 2×10¹⁷ /cm3s approximately [³⁴]. Even responsivity magnitudes are lower for higher insulators’ thicknesses; they remain in the order of reasonable magnitudes for a-Si. They remain very high for thin structures achieving 1.1178 A/W. Comparables results were found in the literature [⁷], [²²], [²⁶]. In [²⁶], responsivity as high as 0.92 A/W was reported for a drain voltage of 10V. In [²²], for a-Si:H MSM Photoconductors that are compatible with TFT fabrication, values of 0.18 A/W were obtained for blue light and for an electrode spacing of 5 µm.

Fig. 19
Recombination rate variation along the source/drain.

IV. Conclusion

Amorphous silicon photo thin-film transistors with double layered insulators using Si₃N₄/Al₂O₃ or HfO₂ are reported. Investigations included direct and transfer characteristics in dark and under illumination, generated photocurrents, external quantum efficiency EQE and responsivity R. Performance is evaluated in terms of the dielectric thickness and nature. The Si₃N₄/Al₂O₃ transistor shows the lowest off- current comparing with Si₃N₄/Al₂O₃ transistor. The HfO₂ device presents the highest on-current when illuminated. The generated photocurrent is higher for Si₃N₄/HfO₂ transistor revealing a lower amount of trapped charge. For very thin thicknesses, under illumination, both devices enhance the Si₃N₄ device off-current and reach Si₃N₄ single layer dielectric based phototransistor performance. EQE and responsivity are higher in HfO₂ devices comparing with Al₂O₃ devices. The results are promising and support further investigations in order to develop high k gate insulators for MIS photo thin-film transistors.

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Publication Dates

• Publication in this collection
  Mar 2019

History

• Received
  15 Sept 2018
• Reviewed
  18 Sept 2018
• Accepted
  27 Dec 2018